SR ASIC SoC Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE TEAM - NETWORKING TECHNOLOGY SOLUTIONS GROUP (NTSG)

AMD'sNetworking Technology Solutions Group (NTSG)is a leading provider ofdatacenterand AI networking technologies. NTSG developshigh performance, scalable networking silicon and platforms that power modern cloud, enterprise, and AI infrastructure. Our solutions include advanced ASICs and SoCs that enablehigh bandwidth,low latencydata movement and acceleration fornext generationAI and distributed computing workloads.

THE ROLE:

We are seeking aSenior Member of Technical Staff (SMTS) ASIC SoC Design Engineerto join our NTSG silicon development team. In this role, you will be asenior technical contributorresponsible for designing and integrating complex SoC subsystems forAI networking ASICs, including both monolithic andchiplet basedSoC architectures.

You will work across the full development lifecycle-from architecture and microarchitecture definition through RTL implementation, integration, and siliconbring up-collaborating closely with architecture, verification, physical design, firmware, and software teams to deliver robust, scalable SoC solutions fornext generationAI networking products. You willoperatewithin a broader SoC architecture and execution framework while owning critical subsystems and integration paths.

THE PERSON:

The ideal candidate is a seasonedSoC / ASIC engineerwith strongsystem levelthinking anda track recordof delivering complex silicon in production. You combine deep technicalexpertisewith agrowth mindset, curiosity about emerging AI technologies, and a passion for improving engineering productivity.

You are comfortable operating at the SMTS level-owning ambiguous problems, influencing technical direction, and collaborating across organizational boundaries to deliverhigh impactresults.

KEY RESPONSIBILITIES:

• LeadSoC leveldesign and integrationof embedded subsystems including CPUs,NoCs, and peripheral IPs for advanced AI networking ASICs

• Drive integration usingSoC IP generation and configuration tools, including NoC,AMBA protocol converters, andCSR generation frameworks

• Design and integratePCIe subsystemsandDMA engines, including configuration, data movement, and performance optimization

• Own and reviewreset architecture, boot flows, and security initialization sequencesat the SoC level, collaborating with firmware and security teams

• Supportchiplet basedSoC integration, includingdie-to-dieconnectivity andsystem levelconsiderations

• Supportsystem levelvalidation andbring-upofchiplet-basedSoCs across multiple dies

• Drivehigh qualityRTL implementation, reviews, and integration across multiple IP blocks and subsystems

• Support full ASIC development lifecycle activities including lint/CDC, synthesis, integration debug, emulation, andpost silicon bring-up

• Debug complex SoC integration issues in simulation, emulation, and silicon

• Continuously explore and adoptAI-assisteddesign and productivity toolsto improve development efficiency and design quality

REQUIRED QUALIFICATIONS:

• Significanthands-onexperience inASIC / SoC developmentfrom architecture through siliconbring-up

• Proven experience withembedded SoC architecturesincluding CPUs andNoCsusingAMBA protocols (AXI/AHB/APB)

• Strong experience withPCIeandDMA architectures

• Hands-on experience using and integrating SoC IP generation and configuration toolsfor NoC, AMBA protocol conversion, and CSR generation

• Proficiencyin RTL design usingSystemVerilog/ Verilog

• Demonstrated experience delivering production ASIC or SoC silicon

• Ability to collaborate effectively across hardware, firmware, and software teams

PREFERRED QUALIFICATIONS:

• Experience withchiplet-basedSoC architecturesanddie-to-die(C2C) connectivity standards such as UCIe

• Background in AI, networking, ordata center classASICs

• Exposure to secure boot, hardware root of trust, or security IP integration

• Experience with emulation, FPGA prototyping, or post silicondebug

• Interest in applyingAI-basedtools or methodologiesto improve design,integration, or debug productivity

ACADEMIC CREDENTIALS:

Bachelor's orMaster's degree in Electrical Engineering, Computer Engineering, or related field

LOCATION:

Santa Clara, CA

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This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.