Engineer-I (Design)

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Job Description:

This position is available to start late spring 2026!

Microchip is seeking an ENTRY LEVEL, proactive and motivated engineer to join our team, focusing on Full Chip and Block-level Physical Design projects (from netlist to GDS) for the DSPIC divisions at Microchip. In this role, you will be responsible for all phases of physical design implementation, including physical verification and stream-out processes to external foundries, specifically for low-power, high-performance DSPIC microcontrollers with an emphasis on cost efficiency.

This position requires strong technical ownership, advanced problem-solving abilities, and the capability to independently manage complex design and workflow challenges

Detailed job functions will include:

• Complete Physical Design implementation including:

  • Floor planning

  • Power planning

  • Sensitive signal planning / routing

  • Place & Route

  • Clock Tree Synthesis (CTS)

  • Timing closure using industry-standard tools such as Cadence Innovus and Synopsys ICC2.

• Drive PPA (Power, Performance, Area) optimization

• Physical verification (DRC/LVS) and IP integration at full chip level.

• Ownership of Physical Design flow and methodology, including continuous improvement.

• Perform and analyze IR drop and EM (Electromigration) checks to ensure design reliability.

• Apply metric-driven design techniques to enable first-pass silicon success.

• Drive flow, methodology development, and automation to improve productivity and quality.

• Collaborate with cross-functional teams including RTL, Synthesis, STA, CAD, and Signoff teams.

• Development of technology setup files for new technologies

• New tool evaluation and research to support back-end flow improvement

Requirements/Qualifications:

Education:

Bachelor/ master's degree in one or more of the following disciplines:
Electrical/Electronics Engineering, Computer Engineering, Computer Science

*0-3 years experience

Technical Skills:

• Deep understanding of CMOS device physics, Ultra-Deep-Sub-Micron effects, Semiconductor process technology and ASIC design and implementation flow

• Strong understanding of STA concepts, including setup/hold timing, clock uncertainties, and constraints.

• Hands-on experience with Place & Route tools (Innovus / ICC2) is preferred

• Scripting skills in one or more languages is preferred

  • Perl, TCL, Python, Shell

• Basic understanding of RTL design (Verilog / VHDL)

Soft Skills:

• Ability to work independently under local project lead or supervisor mentorship.

• Strong debugging, analytical, and problem-solving skills.

• Excellent verbal and written communication skills.

• Strong interpersonal skills and ability to collaborate across global teams.

Travel Time:

Physical Attributes:

Physical Requirements:

Pay Range:

Benefits of working at Microchip

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.