New

Principal Advanced Packaging Design Engineer

Marvell Semiconductor, Inc.
paid time off, flex time, 401(k)
United States, Vermont, Burlington
128 Lakeside Avenue (Show on map)
Nov 21, 2025
About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Marvell Advanced Packaging team is responsible for package design and technology development to meet the electrical, mechanical, thermal and system requirements for the next generation high performance computing (HPC), Artificial Intelligence (AI) and networking solutions. The group focuses on signal integrity, power integrity, thermal integrity, mechanical integrity, processability, manufacturability, and reliability, involving high speed signaling and complex power delivery networks (PDNs) requiring innovative and custom solutions to meet constantly evolving customer needs. Many of the new designs require multi-chip, multiple component configurations involving, but not limited to, 2.5D and 3D packages, Co-packaged copper or optics and advanced substrates. Marvell has partnered with the world's leading manufacturers to solve our customer's most challenging designs and integrations with industry-leading packaging technologies. What You Can Expect This engineer will be responsible for leading small project teams of design and simulation engineers to deliver innovative high quality packaging solutions. The engineer will also interface with package suppliers to select package technology to ensure manufacturability, and compliance with performance, reliability, and cost requirements. What We're Looking For Extensive experience in substrate and/or board design for advanced package technologies with basic understanding of design for manufacturing and reliability as well as electrical performance and the ability to make trade off decisions accordingly Proven ability to lead complex package architecture development projects involving all relevant internal and external customer stakeholders Mastery in tools and workflows: Cadence 3DIC/ISP/APD/SiP Bachelor's degree in electrical engineering or related fields and 15+ years of related professional experience or master's degree and 12+ years of related professional experience or PhD degree with 8+ years of experience. Skills needed to be successful in this role: Innovative thinking, fundamental understanding of design rules, breakout, place and route, signal shielding, reference plane, power distribution, pinout considering overall package and system requirements. Experience with current generation HBM, DDR, SerDes, D2D, D2H, ADC, DAC, PCIE, Ethernet, etc Good understanding of signal and power integrity at substrates, board, package, and system level. Understanding of advanced 2.5D/3D package technology including (a) CoWoS-S/R/L, (b) EMIB, (c) CPO, (d) CPC Familiarity in tools and workflows: Cadence Sigrity/Clarity/Innovus/Virtuoso, Ansys, AutoCAD, SolidWorks Experience contributing to tool, process, and flow development, library maintenance Experience interacting with chip design and electrical simulation teams to optimize the design. Familiarity with running and interpreting signal and power simulations is a plus Ability to manage programs involving cross-functional teams. Strong interpersonal skills and willingness to learn new things are necessary along with the ability to work with stakeholders in multiple time zones across the globe. Strong communication, presentation and documentation skills Expected Base Pay Range (USD) 148,500 - 219,780, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com. *Interview Integrity* As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews. Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-MM1